In high-density memory chips, with a decrease in the size of material constituting individual memory cells (1-bit memory elements), the probability (error rate) that the content of a memory cell is changed to be different from the original content to be stored increases due to fluctuation of characteristics resulting from processing accuracy during manufacturing, or an increase in the influence of disturbance such as temperature, electromagnetic waves, and the like.
As countermeasures to this error, in addition to a method of just increasing the processing accuracy or protecting the memory cells so as to decrease the influence of disturbance, a method of correcting error bits using an error correction code (ECC) is known. The error rate may be caused by the device characteristics of memories in addition to disturbance.
Like MRAMs, RRAMs, or ReRAMs, in electrically rewritable memories using memory cells capable of having two different resistance values, by putting the memory cells into any one of a low-resistance state and a high-resistance state, data are stored so that one resistance state corresponds to a logical value of 0 and the other resistance state corresponds to a logical value of 1. When reading data, the logical value is determined to be 0 or 1 (or 1 or 0) depending on whether the resistance value of a memory cell is smaller or larger than a threshold value.
In such a memory, since it is not possible to directly measure the resistance value during reading, by applying a constant voltage to a memory cell to measure a current value or by flowing a constant current to measure a voltage value, a resistance value is estimated and a logical value is determined.
For example, in MRAMs, the same operation is performed between writing and reading, and reading is performed with intensity such that the content of a memory is not changed. For example, when reading data, a current flows in the same direction as when writing the data of 0, and whether the data is 0 or 1 is determined based on the resistance value at that time.
At this time, the content of a memory which is 1 may be altered to 0. This is called read disturbance, which is affected by fluctuation of the characteristics of a memory cell, and which is a major cause of an increase in the error rate of MRAMs. If the probability (read disturbance probability) of the occurrence of this read disturbance increases, there is a problem in that it is not possible to correct all error bits using the conventional error correction code.
As a technique of preventing destruction of data written to a memory, a nonvolatile semiconductor memory device is proposed in which the number of data “1” in the written data is counted, inverted data of the written data are written to a normal memory portion when the number of data “1” is half or more than the number of bits of the written data, and information indicating the inversion is written to an auxiliary word memory portion, thereby suppressing drain disturb (for example, see Patent Document 1). When reading data from the normal memory portion, data are read from the auxiliary word memory portion to determine whether data was inverted during writing. If data was inverted, the data read from the normal memory portion is inverted and output.
However, since it is necessary to read information indicating whether data is inverted or not from the auxiliary word memory portion whenever data is read, there is a problem in that the reading process is complicated, and the memory access time increases.